Digital Electronics and Logic Circuits (CSCT2202)

Computer Science - COS

Semester: Resit

Level: 200

Year: 2013

Answers (200 )
MINISTRY OF HIGHER EDUCATION REPUBLIC OF CAMEROUN
UNIVERSITY OF BAMENDA PEACE - WORK – FATHERLAND
HIGHER TECHNICAL TEACHERS TRAINING
COLLEGE
DEPARTMENT OF COMPUTER SCIENCE
Level 100
DIGITAL ELECTRONICS: RESIT2013 SESSION
DURATION: 2HOURS; NO DOCUMENT IS ALLOWED
EXERSICE I: DIRECT APPLICATION OF COURSE WORK. (20 marks)
1)
Design a mod 5 asynchronous discounter with RS flip flop
2)
Design a mod 7 synchronous counter with JK flip flop
Exercise II: STUDY OF A SYNCHRONOUS COUNTER (20 marks)
considering 4 JK flip flop UA, UB, UC as connected below, the initial state is QA=QB=QC=QD=0.
1)
Give in the table of state of the outputs QA, QB, QC and QD for at least 10 clocks pulse.
2)
Deduce the modulo of this counter, it is a binary counter?
3)
If initially QA=1, and QB=QC=QD=0, give the table of state of the outputs QA, QB, QC and QD for at
least 10 clocks pulse and conclude
EXERCICE III: STUDY OF AN ASYNCHRONOUS COUNTER (30 marks)
Given the diagram of the asynchronous counter below:
1) Give the table of state of this counter and
deduce the name.
Show that, if Ul is replaced by an AND gate, the
functioning principle remains unchanged (the
output of the said gate controls J
D
, the inputs are
to be determined)
I-
The clock (CLK) of the figure 3 is the output Q
A
of a modulo 2 J-K counter,
3)
Design a modulo 2 J-K counter, name the inputs J
A
-K
A
and name the output Q
A
4)
When this output Q
A
is connected to CLK of the figure 3 above, the set forms a new counter.
- Draw this new counter (figure 4)
- For at least 12 pulses of the clock of this new counter, draw the chronogram of the outputs Q
A
,
Q
B
,
Q
C
,
and Q
D
.
5)
In the form of a truth table, summarized the outputs Q
A
, Q
b
, Q
c,
and Q
D
, which name can be given to this
figure 4?
II-
Coming back 'to the figure 3 above, Q
c
is used to clock a modulo 2 J-K counter with Q
A
as output. This
new set form a new counter (figure 5)
6)
Draw this figure 5 and for at least 12 pulses of the clock of this figure 5, draw the chronogram of the
outputs Q
B
, Q
C
, Q
D
and Q
A
7)
Q
A
been the output of this figure 5, what is the relation between the clock frequency and Q
A
frequency?
Give the name to this figure 5.
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